Appuyez sur Suivant (ou utilisez vos touches fléchées) pour avancer une idée à la fois. Une vérification fixe en trois questions vous attend à la fin : le point de contrôle propre au cours, les mêmes questions à chaque tentative. Le ← en haut vous permet de quitter à tout moment ; la progression est conservée.
Single-qubit gates
X flips |0⟩ and |1⟩. Z changes the phase of |1⟩. H creates or recombines equal superpositions. S and T apply phase rotations. Rx, Ry, and Rz provide continuous rotations.
Gates transform amplitudes and phase through unitary matrices.
Controlled gates
CNOT flips a target when the control is |1⟩. Combined with H, it creates a Bell state. Controlled operations are central to entanglement, arithmetic, phase kickback, and error correction.
Two-qubit gates create conditional structure and are usually noisier than single-qubit gates.
Circuit depth and compilation
A logical circuit must be mapped to the device's native gate set and connectivity. Compilation inserts swaps, decomposes gates, and optimizes depth. Hardware-aware compilation can determine whether a circuit is practical.
The same abstract algorithm can perform very differently after hardware mapping.
Applied activity
Complete a simulator or analysis exercise: reproduce the lesson's central example, record assumptions and outputs, and explain one source of error or limitation.
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1. Single-qubit gates
X flips |0⟩ and |1⟩. Z changes the phase of |1⟩. H creates or recombines equal superpositions. S and T apply phase rotations. Rx, Ry, and Rz provide continuous rotations.
Gates transform amplitudes and phase through unitary matrices.
2. Controlled gates
CNOT flips a target when the control is |1⟩. Combined with H, it creates a Bell state. Controlled operations are central to entanglement, arithmetic, phase kickback, and error correction.
Two-qubit gates create conditional structure and are usually noisier than single-qubit gates.
3. Circuit depth and compilation
A logical circuit must be mapped to the device's native gate set and connectivity. Compilation inserts swaps, decomposes gates, and optimizes depth. Hardware-aware compilation can determine whether a circuit is practical.
The same abstract algorithm can perform very differently after hardware mapping.
4. Applied activity
Complete a simulator or analysis exercise: reproduce the lesson's central example, record assumptions and outputs, and explain one source of error or limitation.
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